Building semiconductors is an incredibly exacting process, with critical dimensions posing significant equipment challenges – and with the possibility that small process excursions can cause the yield to decrease. For this reason, it has always been important to measure and monitor the most critical process steps to ensure that no further processing is done on a faulty lot and so that equipment can be brought back into spec before any more lots are misprocessed.
As device structures become more complicated and require more process steps, process control becomes even more critical. Conventional metrology is challenged to characterize the tiny features with the required sensitivity. Fab metrology on simplified test structures or monitor wafers is not necessarily reflective of the actual structures. Lab metrology (e.g., TEM, XPS, etc.) is slow, expensive, and, of course, often destructive.
Process engineers have been looking for ways to break out of the cycle of complexity while maintaining the level of quality that chip users rely on. This search has yielded a new approach to semiconductor process monitoring that promises to be simpler, less expensive, and less time consuming than traditional approaches. It’s called mass metrology.
Most semiconductor processing steps involve the addition or removal of material. The typical approach to monitoring is to measure the dimensions of this addition or removal. Depositing a layer of metal? Then you want to measure how thick that new layer is. Oxidizing silicon to a desired thickness? Then you want to measure the resulting oxide thickness. Etching away material to create features or through-silicon vias (TSVs)? You need to measure the critical dimension (CD), depth, and sidewall profile. Grinding or polishing away a part of the wafer? Then you measure the change in thickness of material that has been removed. Changing fundamental material properties like density or refractive index by a process like curing?
Then you want to measure how that process has changed those properties. The focus is traditionally on thickness, depth, and CD. But, increasingly, these measurements are becoming more difficult to do with high fidelity both because of the increasingly minute scales involved and because of increasingly complex 3D device architectures (FinFET, 3D NAND, 3D XPoint) – a tricky business. And even measuring a newly added layer of metal atop existing metal can be hard because it’s exceedingly difficult to resolve where the old metal stops and the new metal starts.
If one obvious dimension for measuring addition and removal is the thickness of the added or subtracted material, there’s another obvious dimension, the process of adding or removing material changes the mass of the wafer. By measuring the mass change with enough fidelity and in a well-characterized process, you can directly measure whether the appropriate amount of material has been added or removed.
But the obvious question is, given the tiny amounts of material we’re talking about, can you really detect angstrom-level problems reliably? Pioneering development work has shown that, yes, given mass measurements with 3σ precision in the 100 micrograms range, translates to sensitivity at angstroms of material added or removed. Furthermore, in many applications, the sensitivity of mass measurements increases with aspect ratio, perfectly suitable for 3D process.
Mass measurements are non-invasive, taken directly on the product wafer with only backside contact, meaning that the measurement itself shouldn’t be a cause of any circuit-level damage. And they can be completed in about a minute, supporting high sample rate measurement.
This approach can be used across the wide variety of steps involved in any device fabrication on wafer, including integrated circuit and MEMS manufacturing. Examples include:
The same simple measurement approach can be leveraged across all of these and many more applications, speeding up overall processing, increasing throughput, and reducing the cost of the finished wafer.
Some of the most compelling applications for mass metrology can be found in the 3D NAND process flow, as shown in figure 1. The multi-layer stack deposition, which can be difficult to model by optical CD methods, is an excellent use case. For high aspect ratio structures such as the channel hole etch, mass metrology has advantages over optical methods which may not be able to provide information on the hole bottom critical dimension. Replacement gate recess and fill processes, which are lateral and thus inaccessible by optical methods, are good candidates as well.
Figure 1. Many 3D NAND processing steps can be monitored by mass metrology
ALD films can also be monitored effectively by mass metrology. While at first glance, the ALD application may be surprising, let’s remember the application itself – conformal deposition – typically involves an area much greater than a blanket deposition layer, and even more so on high aspect ratio device topologies. Mass sensitivity to film on a patterned wafer can be as much as 10 times or more than on a blanket wafer (figure 2).
Figure 2. Mass sensitivity to film on patterned wafer is >10X better than on blanket wafer
For ALD applications, the most critical requirement is to have complete and uniform coverage from top to bottom on the 3D devices. A thinner or incomplete deposition at the bottom of the device often leads to high leakage and high failure rate. While conventional optical thickness measurement on test target matches well to the thickness variation to the top of the device, it doesn’t capture the process deviation at the bottom. Mass metrology, on the other hand, monitors the amount of material change from the whole device. For example, in figure 3 we compare mass change induced by flow rate reduction on blanket and pattern wafers. While on blanket wafers significant mass change occurs after 3% of flow rate reduction, on patterned wafers it starts to deviate after 1% reduction. Mass measurement detects low coverage of ALD film at the bottom of the device that otherwise would be missed by optical measurement on blanket wafer or solid film test pad.
Figure 3. Small flow rate reductions can be detected, as mass metrology monitors material change across the entire device
Nearly all advanced semiconductor processes involve precisely adding or removing a correct amount of materials. In today’s 3D process, the amount of materials often scales with the aspect ratio. Mass metrology, with high sensitivity to process variation in 3D device, provides an ideal solution to the challenge of process control for 3D device fabrication.