Achieving incredibly small dimensions for next-generation chips will involve new technologies with more stringent specifications. For one thing, greater control of process variability will be needed, according to Lam’s Rick Gottscho. In a Solid State Technology article in which experts discussed industry trends and drivers, Rick shared his views on this challenging requirement, particularly as the industry moves toward the 10 nm node.
Rick explained how techniques like advanced patterning make variability control more challenging for several process areas and identified three types of process variation that need to be addressed: within each die or integrated circuit, from die to die across the wafer, and from wafer to wafer. He also pointed out the growing need for technologies such as atomic-layer deposition (ALD) and atomic-layer etch (ALE) that provide the stringent control increasingly required for advanced technology nodes.
Richard Gottscho, Ph.D., Executive Vice President, Lam Research Corporation
This year, the semiconductor industry should see the emergence of chip-making at the 10 nm technology node. When building devices with geometries this small, controlling manufacturing process variability is essential and most challenging since variation tolerance scales with device dimensions.
Controlling variability has always been important for improving yield and device performance. With every advance in technology and change in design rule, tighter process controls are needed to achieve these benefits. …
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