To create smaller and denser features for advanced devices, chipmakers are turning to multiple patterning techniques. Because these are multi-step processes, managing variability is critical since each step adds to overall variation. As more applications require this stringent level of process control, customers are adopting Lam’s conductor etch solutions with Hydra® technology – an innovation that provides localized tuning to minimize variation across the wafer. In fact, our Kiyo® with Hydra products recently achieved a milestone shipment because of wins for advanced logic and memory applications, as explained in the announcement below.
Milestone showcases expanding leadership in multiple patterning with recent wins for advanced nodes at leading logic and memory customers
FREMONT, CA — (Marketwired) – 7/13/15 – Lam Research Corp. (NASDAQ: LRCX), a major global supplier of innovative wafer fabrication equipment and services to the semiconductor industry, today announced it has shipped its 200th Kiyo® conductor etch module with proprietary Hydra® technology. By enabling multiple patterning inflections at advanced nodes, the product is rapidly gaining momentum with customers across industry segments. In memory, the installed base is growing as a result of implementation for advanced DRAM, planar NAND, and 3D NAND with shipments doubling in the past quarter. In logic, the product is positioned at all major foundries and manufacturers focused on multi-patterning-intensive FinFET technology. In addition, Lam’s Kiyo with Hydra technology was recently successful in expanding its applications base at the 10 nm node by greater than five-fold over the previous node at a leading U.S. logic manufacturer.
“Achieving this important product milestone demonstrates not only our leadership in multi-patterning, but also that focusing on customers’ toughest challenges increases our opportunity node over node,” said Richard Gottscho, Lam’s executive vice president of Global Products. “As the complexity of scaling continues to increase, driving both technical and economic challenges, our focus on collaboration is more critical than ever in helping our customers sustain long-term success.”
Multi-patterning schemes enable continued scaling for leading-edge logic and memory devices and require strict critical dimension (CD) and uniformity control across the wafer and from wafer to wafer. As the number of process steps for these applications continues to grow, minimizing variability is increasingly important as each additional step contributes to overall variation. At the same time, high productivity solutions are needed to offset increasing manufacturing costs due to added steps. As part of Lam’s market-leading Kiyo conductor etch family, Kiyo with Hydra technology addresses these challenges while delivering cost-effective productivity. A symmetrical chamber design with radial tuning provides best-in-class uniformity to minimize CD variability. The Hydra Uniformity System employs advanced software algorithms in combination with proprietary hardware technology to enable localized fine tuning that minimizes variation across the wafer by correcting for incoming pattern non-uniformities. In addition, multiple process steps can be completed in one pass to reduce manufacturing costs.